In the manufacture of semiconductor components, steps such as photolithography, etching, doping, and passivation are referred to as front-end processing steps, whereas steps such as dicing, substrate mounting, and encapsulation are referred to as back-end processing steps. Thus, the steps up to and including passivation are the front-end steps and the steps from dicing to completion of the semiconductor component are the back-end steps. After completion of the back-end steps, the semiconductor components are subjected to a power cycling test in which they are electrically stressed to detect any defective semiconductor components. One type of defect associated with the back-end steps is excessive lid tilt. FIG. 1 illustrates a semiconductor component 10 having excessive lid tilt. What is shown in FIG. 1 is a cross-sectional side view of a pin grid array (PGA) substrate 12 having a major surface 14 on which a semiconductor chip 16 is flip-chip mounted. Solder bumps 18 that are formed on a top surface 20 of semiconductor chip 16 are bonded to bond pads (not shown) disposed on major surface 14 of PGA substrate 12. After bonding, an underfill material 22 is dispensed between semiconductor chip 16 and major surface 14. A thermal interface material 24 is disposed on a back surface 26 of semiconductor chip 16 and a lid adhesive 28 is dispensed on major surface 14. A lid 30 having an inner surface 32, an outer surface 34, and a lip or support 36 is positioned in lid adhesive 28 to form semiconductor component 10.
Semiconductor component 10 is placed in a side-actuated or clamshell clamp fixture (not shown) which applies an asymmetric force on lid 30, i.e., the force applied to one side 42 of lid 30 is greater than the force applied to the other side 44 of lid 30. The clamp fixture housing PGA substrate 12, semiconductor chip 16, and lid 30 is placed in a curing oven to cure lid adhesive 28. A drawback of prior art clamp fixtures is that they cause lid tilt by applying an uneven force to lid 30. Often, the lid tilt exceeds specified tolerances. When the distance indicated by arrows 46 equals the distance indicated by arrows 48, the amount of lid tilt is zero. The amount of lid tilt is unacceptable when the distance indicated by arrows 46 exceeds the distance indicated by arrows 48 by more than a specified amount. Lid tilt becomes an even greater problem when the clamp fixture is adapted to accept multiple semiconductor components 10. One consequence of excessive lid tilt arises during power cycling of semiconductor component 10. During power cycling, semiconductor chip 16 generates heat which is transferred to PGA substrate 12, underfill material 22, and lid adhesive 28. Because PGA substrate 12, semiconductor chip 16, underfill material 22, and lid adhesive 28 have different coefficients of thermal expansion, the heat generated by semiconductor chip 16 causes movement between semiconductor chip 16 and lid 30. This movement squeezes out the thermal interface material 24 that is between semiconductor chip 16 and lid 30. The greater the amount of lid tilt, the greater the amount of thermal interface material 24 that is squeezed out from between semiconductor chip 16 and lid 30. The squeezing out of thermal interface material 24 decreases the amount of material between semiconductor chip 16 and lid 30, thereby increasing the thermal resistance between them. Thus, heat is not effectively removed from semiconductor chip 16 through lid 30 which may result in thermal failure of semiconductor chip 16.
Accordingly, what is needed are methods for manufacturing a semiconductor component that is capable of dissipating heat and a fixture for manufacturing the semiconductor component.